Compiler Analysis for Hardware/Software Co-design and Optimization
Staff - Faculty of Informatics
Date: / -
USI Lugano Campus, room SI-003, Informatics building (Via G. Buffi 13)
You are cordially invited to attend the PhD Dissertation Defense of Georgios Zacharopoulos on Thursday January 9th, 2020 at 09:30 in room SI-003 (Informatics building).
Time and energy are finite resources, in contrast to the need for faster and more energy efficient computing systems in our every day life. The breakdown of Dennard scaling, along with the seemingly inevitable end of Moore’s law economic aspect, present a new challenge to computer architects striving to achieve better performance in modern computer systems. Heterogeneous computing is hence emerging as one of the solutions to overcome these limitations, in order to keep the performance trend rising. Heterogeneous platforms employ specialized hardware (HW) that can accelerate the execution of a software (SW) application, or a part of that application. However, the design of efficient HW/SW computer architectures is a challenging problem, as it entails integration of a general purpose CPU with a number of specialized HW accelerators. The choice of which parts of an application to be accelerated as well as the optimizations to be applied to the HW accelerated parts, while taking into account the underlying memory system and the platform characteristics that the HW accelerators are implemented onto, are all non-trivial research questions and depend heavily on the characteristics of the SW applications that are going to be accelerated. Therefore, an in-depth SW analysis can be crucial, prior to designing a heterogeneous system, as it can provide valuable information and subsequently highly benefit performance. My research has revolved around building automation frameworks that can aid HW engineers in the early stages of the design process. I have extended the capabilities of compiler infrastructures, while addressing these research questions, so that better decisions are made and, in turn, faster execution and improved energy efficiency is achieved. The frameworks I developed are, hence, valuable automation aids for the HW/SW partitioning and optimization phases, driving the designs of effective heterogeneous platforms one step forward.
- Prof. Laura Pozzi, Università della Svizzera italiana, Switzerland (Research Advisor)
- Prof. Cesare Alippi, Università della Svizzera italiana, Switzerland (Internal Member)
- Prof. Olaf Schenk, Università della Svizzera italiana, Switzerland (Internal Member)
- Prof. Luca Carloni, Columbia University, USA (External Member)
- Prof. Timothy Jones, University of Cambridge, UK (External Member)
- Prof. Aviral Shrivastava , Arizona State University, USA (External Member)