Informatics seminar on Monday, March 23rd, 16.30 - Dr. Federico Angiolini

Staff - Faculty of Informatics

Start date: 23 March 2009

End date: 24 March 2009

The Faculty of Informatics is pleased to announce a seminar given by Dr. Federico Angiolini


TITLE: Network-on-Chips as the Backbone of Complex, Heterogeneous SoCs


SPEAKER: Dr. Federico Angiolini


DATE: Monday, March 23rd, 2009


PLACE: USI Università della Svizzera italiana, room SI-008, Informatics building (Via G. Buffi 13)


TIME: 16.30




Today's Systems-on-Chips (SoCs) are increasingly complex, integrating tens of heterogeneous IP cores to perform diverse functions. A typical chip for smartphones features today about 50 IP cores, ranging from general-purpose processors to memories, from I/O interfaces to accelerators for multimedia, gaming and signal processing. At the same time, the scaling of manufacturing technologies brings new physical-level challenges, including growing propagation delays on global wires. Both trends emphasize the challenges in designing the chip interconnect, which must link all the IP cores together.


Future SoCs are going to be interconnect-centric. The interconnect will represent a crucial architectural backbone, both as a functional enabler and as a provider of runtime services (quality of performance, protocol conversion, multiple-frequency operation, low-power operation, fault tolerance, security) to the IP cores. Further, the interconnect must be easy to design, must be efficient in terms of performance/power and performance/area, and it must successfully achieve timing closure. Networks-on-Chips (NoCs) are the ideal answer to these challenges, by providing a scalable, packet-based, on-chip communication backbone.


This talk will present the basics of NoC design, some details of iNoCs technology, and a brief report from the field on how to build a high-tech academic spin-off in Switzerland.



Federico Angiolini is currently the VP of Engineering at iNoCs, of which he was also founder and CEO through 2008.

He got MSc and PhD degrees from University of Bologna, Italy, in 2003 and 2008 respectively, in the domain of Electronic Engineering. Before committing to iNoCs, he published about 30 papers in international conferences and journals, mostly in the domain of multicore embedded systems, embedded memory hierarchies, and Networks-on-Chips. Dr. Angiolini is a member of several conference technical program committees, including NoCs.


HOST: Francesco Regazzoni and Leandro Fiorin