Understanding performance and energy efficiency trade-offs under power capping and frequency scaling scenarios

Speaker: Prof. Dr. Gerhard Wellein, Friedrich-Alexander-Universität Erlangen-Nürnberg 

Abstract: Growing demands from simulation and AI/ML are pushing HPC energy consumption to critical levels. Power capping and frequency scaling can reduce power, but they risk increasing runtime, which may offset energy savings. This relationship is complex and depends heavily on hardware characteristics and application bottlenecks like memory bandwidth or compute speed. This presentation reviews key energy metrics and provides guidelines for power capping on modern HPC hardware, including high-core count CPUs and state-of-the-art GPUs like NVIDIA's Hopper and Blackwell architectures. We analyze these dynamics across benchmark kernels and real-world simulation and AI workloads to find the optimal sweet spot between power limits and performance..

Biography: Gerhard Wellein is a Professor for High Performance Computing at the Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU) and holds a PhD in theoretical physics. He serves as director of the Erlangen National Center for High Performance Computing (NHR@FAU) and sits on the board of the German NHR-Alliance. Additionally, he is a Visiting Professor for HPC at Delft University of Technology and previously lectured at USI. With over 20 years of experience teaching HPC techniques, he co-received the "2011 Informatics Europe Curriculum Best Practices Award." His research focuses on performance modeling and engineering, architecture-specific code optimization, parallelization, and stencil solvers. He has led numerous national and international HPC projects and authored over 100 peer-reviewed publications.

Host: Prof. Olaf Schenk