Prof. Dr. Natasha Sharygina

  • Full Professor
  • Some lecture videos: Tutorial at Facebook, London (starts at 00:47:11), Presentation at ETH, Zurich

My primary research interests are in formal verification, using model checking and related logic-based reasoning, with the focus on the integrated development of efficient SAT/SMT solvers.

I joined USI in 2005 by moving from Carnegie Mellon University (CMU) after receiving a career award from the Swiss Tasso Foundation.

At USI I established the USI Formal Verification and Security Lab, which projects focus on automated formal verification with a particular interest in software/hardware model checking for safety analysis and information security. We create both theoretical frameworks and practical tools to enable sound and scalable verification of industrial-size computer systems.

Research of my Lab has been supported by USI, Swiss National Science Foundation, Hasler Foundation and EU STReP and COST projects.

Current Initiatives

Last updated in March, 2021.