I am a Professor in the Informatics Faculty at USI Lugano, Switzerland.

I am interested in the interaction between compiler and architecture design, particularly in the field of embedded systems.

My research interests include: The automation of embedded processor customization; The definition of innovative reconfigurable fabrics — both in terms of how to architect them and how to compile onto them; Approximate Computing and Approximate Logic Synthesis: the process of approximating any gate-level circuit automatically, under a given error constraint; High Level Synthesis and Design Space Exploration: how to raise the level of abstraction of HLS by automatically selecting the right design decisions (such as 'pragmas') for the programme; Fuzzing: generating test cases automatically to complement manually written test suites, in the quest to find bugs in software.

My current group: Morteza Rezaalipour (PhD student), Riccardo Felici (PhD student), Cristian Tirelli (PhD student). Alumni: Ilaria Scarabottolo (PhD student and then Postdoc), Lorenzo Ferretti (PhD student and then Postdoc), Georgios Zacharopoulous (PhD student), Giovanni Ansaloni (PhD student and then Postdoc), Paolo Bonzini (PhD student).

Nice things:

I won the Credit Swiss Best Teaching Award! Picture here

I organize an event to celebrate the United Nation International Women and Girls in Science Day at USI Informatics every year

Our students in the USI Programming Team scored in the TOP 6.6 percent in the SWERC Programming Contest, twice.

Recent Publications:

DSN-W2023:Morteza Rezaalipour, Marco Biasion, Ilaria Scarabottolo, George A. Constantinides, Laura Pozzi. A Parametrizable Template for Approximate Logic Synthesis, DSN-W 2023: 175-178 find the paper pdf here

DATE2023:Cristian Tirelli, Lorenzo Ferretti, Laura Pozzi. SAT-MapIt: A SAT-based Modulo Scheduling Mapper for Coarse Grain Reconfigurable Architectures, DATE 2023: 1-6.

TODAES2023:Lorenzo Ferretti, Andrea Cini, Georgios Zacharopoulos, Cesare Alippi, Laura Pozzi. Graph Neural Networks for High-Level Synthesis Design Space Exploration, ACM Trans. Design Autom. Electr. Syst. 28(2): 25:1-25:20 (2023).

TCAD2022:Ilaria Scarabottolo, Giovanni Ansaloni, George A. Constantinides, Laura Pozzi. A Formal Framework for Maximum Error Estimation in Approximate Logic Synthesis, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(4): 840-853 (2022).

DATE2022:Lorenzo Ferretti, Giovanni Ansaloni, Renaud Marquis, Tomás Teijeiro, Philippe Ryvlin, David Atienza, Laura Pozzi. INCLASS: Incremental Classification Strategy for Self-Aware Epileptic Seizure Detection, DATE 2022: 1449-1454.

ESL2021:Lorenzo Ferretti, Jihye Kwon, Giovanni Ansaloni, Giuseppe Di Guglielmo, Luca P. Carloni, Laura Pozzi. DB4HLS: A Database of High-Level Synthesis Design Space Explorations, IEEE Embed. Syst. Lett. 13(4): 194-197 (2021).

TETC2021:Lorenzo Ferretti, Giovanni Ansaloni, Laura Pozzi. Cluster-Based Heuristic for High Level Synthesis Design Space Exploration, IEEE Trans. Emerg. Top. Comput. 9(1): 35-43 (2021).

PIEEE2020: Ilaria Scarabottolo, Giovanni Ansaloni, George A. Constantinides, Laura Pozzi, Sherief Reda. Approximate Logic Synthesis: A Survey, Proc. IEEE 108(12): 2195-2213 (2020), special issue on Approximate Computing. 2020.

CASES2020 / TCAD :Lorenzo Ferretti, Jihye Kwon, Giovanni Ansaloni, Giuseppe Di Guglielmo, Luca Carloni and Laura Pozzi. Leveraging Prior Knowledge for Effective Design-Space Exploration in High-Level Synthesis, presented at the International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES), published on the IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(11): 3736-3747 (2020).